Sipeed Maix-1 W RISC-V Dual Core 64bit With FPU WIFI AI Module Core Board Development Board Mini PC
Product Description
Product Description
| FEATURES OVERVIEW | |
| CPU : RISC-V Dual Core 64bit, 400Mh adjustable | Powerful dual-core 64-bit open architecture-based processor with rich community resources |
| FPU Specifications | IEEE754-2008 compliant high-performance pipelined FPU |
| Debugging Support | High-speed UART and JTAG interface for debugging |
| Neural Network Processor (KPU) | • Supports the fixed-point model that the mainstream training framework trains according to specific restriction rules • There is no direct limit on the number of network layers, and each layer of convolutional neural network parameters can be configured separately, including the number of input and output channels, and the input and output line width and column height • Support for 1×1 and 3×3 convolution kernels • Support for any form of activation function • The maximum supported neural network parameter size for real-time work is 5MiB to 5.9MiB • The maximum supported network parameter size when working in non-real time is (flash size – software size) |
| Audio Processor (APU) | • Up to 8 channels of audio input data, ie 4 stereo channels • Simultaneous scanning pre-processing and beamforming for sound sources in up to 16 directions • Supports one active voice stream output • 16-bit wide internal audio signal processing • Support for 12-bit, 16-bit, 24-bit, and 32-bit input data widths • Multi-channel direct raw signal output • Up to 192kHz sample rate • Built-in FFT unit supports 512-point FFT of audio data • Uses system DMAC to store output data in system memory |
| Static Random-Access Memory (SRAM) | The SRAM is split into two parts, 6MiB of on-chip general-purpose SRAM memory and 2MiB of on-chip AI SRAM memory, for a total of 8MiB |
| Field Programmable IO Array (FPIOA/IOMUX) | FPIOA allows users to map 255 internal functions to 48 free IOs on the chip |
| Digital Video Port (DVP) | Maximum frame size 640×480 |
| FFT Accelerator | The FFT accelerator is a hardware implementation of the Fast Fourier Transform (FFT) |
| SOFTWARE FEATURES | |
| FreeRtos & Standard SDK | Support FreeRtos and Standrad development kit. |
| MicroPython Support | Support MicroPython on M1 |
| Machine vision | Machine vision based on convolutional neural network |
| Machine hearing | High performance microphone array processor |
| HARDWARE FEATURES | |
| Supply voltage of external power supply | 4.8V ~ 5.2V |
| Supply current of external power supply | >600mA |
| Temperature rise | <30K |
| Range of working temperature | -30℃ ~ 85℃ |
| RF FEATURES | |
| MCU : ESP8285 | Tensilica L106 32-bit MCU |
| Wireless Standard | 802.11 b/g/n |
| Frequency Range | 2400Mhz – 2483.5Mhz |
| TX Power(Conduction test) | 802.11.b : +15dBm 802.11.g : +10dBm(54Mbps) 802.11.n : +10dBm (65Mbps) |
| Antenna Connector | IPEX 3.0×3.0mm |
| Wi-Fi mode | Station/SoftAP/SoftAP+Station |
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Package Included:
1x Sipeed Maix-1 Module with WIFI
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